IEEE Transactions on Biomedical Circuits and Systems

A Tiny Transformer for Low-Power Arrhythmia Classification on Microcontrollers
Busia P, Scrugli MA, Jung VJ, Benini L and Meloni P
Wearable systems for the continuous and real-time monitoring of cardiovascular diseases are becoming widespread and valuable assets in diagnosis and therapy. A promising approach for real-time analysis of the electrocardiographic (ECG) signal and the detection of heart conditions, such as arrhythmia, is represented by the transformer machine learning model. Transformers are powerful models for the classification of time series, although efficient implementation in the wearable domain raises significant design challenges, to combine adequate accuracy and a suitable complexity. In this work, we present a tiny transformer model for the analysis of the ECG signal, requiring only 6k parameters and reaching 98.97% accuracy in the recognition of the 5 most common arrhythmia classes from the MIT-BIH Arrhythmia database, assessed considering 8-bit integer inference as required for efficient execution on low-power microcontroller-based devices. We explored an augmentation-based training approach for improving the robustness against electrode motion artifacts noise, resulting in a worst-case post-deployment performance assessment of 98.36% accuracy. Suitability for wearable monitoring solutions is finally demonstrated through efficient deployment on the parallel ultra-low-power GAP9 processor, where inference execution requires 4.28ms and 0.09mJ.
ACE: Automated Optimization Towards Iterative Classification in Edge Health Monitors
Wang Y, Orlandic L, Machetti S, Ansaloni G and Atienza D
Wearable devices for health monitoring are essential for tracking individuals' health status and facilitating early detection of diseases. However, processing biomedical signals online for real-time monitoring is challenging due to limited computational resources on edge devices. To address this challenge, we propose an application-agnostic methodology called ACE (Automated optimization towards classification on the Edge). ACE converts a health monitoring algorithm with feature extraction and classification into an iterative detection process, incorporating algorithms of varying complexities and minimizing re-computation of shared data. First, ACE decomposes a monolithic model, employing a single feature set and classifier, into multiple algorithms with different computational complexities. Then, our automatic analysis tool integrates buffering logic into these algorithms to prevent re-computation of shared computational-intensive data. The optimized algorithm is then converted into a low-level language in C for deployment. During runtime, the system initiates monitoring with the lowest complexity algorithm and iteratively involves algorithms with higher complexity without recomputing the existing data. The iteration process continues until a pre-defined confidence threshold is met. We demonstrate the effectiveness of ACE on two biomedical applications: seizure detection and emotional state classification. ACE achieves at least 28.9% and 18.9% runtime savings without any accuracy loss on a Cortex-A9 edge platform for the two benchmarks, respectively. We discuss and demonstrate how ACE can be used by designers of such biomedical algorithms to automatically optimize and deploy their applications on the edge.
Erratum to "Design of an Extreme Low Cutoff Frequency Highpass Frontend for CMOS ISFET via Direct Tunneling Principle"
Liang J and Hu Y
In [1], in section III.E of the article, we calculate the equivalent tunnelling current according to equation (4) by using the value of Cg, eff as 1.679 fF, which is about 4.6 times smaller than the correct value. This leads to the wrong equivalent impedance value obtained in the final Fig. 10 is about 4.6 times larger than the correct value, and the equivalent impedance should be about 2.2 PΩ at this size, so according to the basis of the above, the article should be corrected as follows.
Real-Time sEMG Processing With Spiking Neural Networks on a Low-Power 5K-LUT FPGA
Scrugli MA, Leone G, Busia P, Raffo L and Meloni P
The accurate modeling of hand movement based on the analysis of surface electromyographic (sEMG) signals offers exciting opportunities for the development of complex prosthetic devices and human-machine interfaces, moving from discrete gesture recognition, towards continuous movement tracking. In this study, we present two solutions for real-time sEMG processing, based on lightweight Spiking Neural Networks (SNNs) and efficiently implemented on a Lattice iCE40-UltraPlus FPGA, especially suitable for low-power applications. We first assess the performance in the discrete finger gesture recognition task, considering as a reference the NinaPro DB5 dataset, and demonstrating an accuracy of 83.17% in the classification of twelve different finger gestures. We also consider the more challenging problem of continuous finger force modeling, referencing the Hyser dataset for finger tracking during independent extension and contraction exercises. The assessment reveals a correlation of up to 0.875 with the ground-truth forces. Our systems take advantage of SNNs' inherent efficiency and, dissipating 11.31 mW in active mode, consume 44.6 µJ for a gesture recognition classification and 1.19 µJ for a force modeling inference. Considering dynamic power-consumption management and the introduction of idle periods, average power drops to 1.84 mW and 3.69 mW for these respective tasks.
Real-Time Imaging Enhancement of Handheld Photoacoustic System With FeRAM Crossbar Array based Neuromorphic Design
Zhang Z, Cao T, Liu S, Jin H, Wang W, Yin X, Liu C, Ling GW, Gao Y and Zheng Y
The miniaturization and real time imaging capability have always been the desired properties of photoacoustic imaging (PAI) system, which unlocked vast potential for personalized healthcare and diagnostics. While the imaging quality and resolution in such systems are inferior due to physics and system volume constraints, which limited its wide deployment and application. This paper proposes a novel platform to enhance the imaging quality of handheld PAI system in real time, integrating MultiResU-Net imaging enhancement algorithm with Ferroelectric random-access memory (FeRAM) crossbar array. The FeRAM crossbar array enables in memory computing, which is highly suitable for accelerating deep neural network where extensive matrix multiplications are involved. The hardware implementation of the algorithm is optimized for low-power operation on edge devices, a specifically designed algorithmic strategy is further introduced to accurately simulate the impact of hardware variation on the computation in the array with time complexity of O(mn). The feasibility and effectiveness of this method are demonstrated through simulation data (synthesized through physical model) and in vivo data, the experimental results demonstrate more than 10 times of imaging resolution improvement. The execution of neural network inference has been significantly accelerated and can be completed within a few microseconds, fully covering the imaging speed in handheld PAI system and satisfying the real time imaging capability. The whole platform can be integrated into a compact size of 25×25×20 cm, which is a portable system with real time and high resolution imaging capability.
Smart Wearable TENS Device for Home-based Overactive Bladder Management
Ju W, McConnell-Trevillion A, Vaca-Benavides DA, Khan SR, Shenkin SD, Nazarpour K and Mitra S
We present the TENSmini, a compact and wearable device (38 × 38 × 21 mm, weighing only 31 g), designed for home-based self-management of overactive bladder syndrome (OAB). The device integrates two conductive textile electrodes into a sock, which can be washed and reused. It is wirelessly controlled with mobile devices to generate current pulses with adjustable frequency from 1 to 100 Hz, pulse width of 50 to 250 μs, and amplitude of up to 60 mA. A safety-enhanced drive circuit with galvanic isolation and automatic detection mechanism monitors electrode connections, prevents over-current, and protects users against open-circuit conditions. We report on the electrical properties of the conductive textile electrodes and present results from a real-world study involving ten human participants. The findings confirm that the wearable device effectively stimulates the tibial nerve and performs comparable to a clinical-grade stimulator. In general, the proposed system shows potential for OAB management due to its wearability, improved safety features, and long-term reusability.
A Six-Transistor Integrate-and-Fire Neuron Enabling Chaotic Dynamics
Bhattacharyya S and Hasler JO
Integrate-and-fire (I&F) neurons used in neuromorphic systems are traditionally optimized for low energy-per-spike and high density, often excluding the complex dynamics of biological neurons. Limited dynamics cause missed opportunities in applications such as modeling time-varying physical systems, where using a small number of neurons with rich nonlinearities can enhance network performance, even when rich neurons incur a marginally higher cost. By adding additional coupling into the gate of one transistor within an I&F neuron, we parsimoniously achieve a highly nonlinear system capable of exhibiting rich dynamics and chaos. The dynamics of this novel neuron include regular spiking, fast spiking, and chaotic chattering, and can be tuned via the neuron parameters and input current. We implement and experimentally demonstrate the behavior of our chaotic neuron and its subcircuits on a 350 nm field-programmable analog array. Experimental insights inform a compact simulation model, which validates experimental results and confirms that the additional coupling incites chaos. Results are corroborated with comparisons to traditional I&F neurons. Our chaotic circuit achieves the lowest area (0.0025 mm), power draw (1.1-2.6 μW), and transistor count (6T) of any nondriven chaotic system in integrated CMOS thus far. We also demonstrate the utility of our neuron for neuroscience exploration and hardware security.
Efficient Inductive Link Design: A Systematic Method for Optimum Biomedical Wireless Power Transfer in Area-Constrained Implants
Omi AI, Jiang A and Chatterjee B
In the context of implantable bioelectronics, this work provides new insights into maximizing biomedical wireless power transfer (BWPT) via the systematic development of inductive links. This approach addresses the specific challenges of power transfer efficiency (PTE) optimization within the spatial/area constraints of bio-implants embedded in tissue. Key contributions include the derivation of an optimal self-inductance with S-parameter-based analyses leading to the codesign of planar spiral coils and L-section impedance matching networks. To validate the proposed design methodology, two coil prototypes- one symmetric (type-1) and one asymmetric (type- 2)- were fabricated and tested for PTE in pork tissue. Targeting a 20 MHz design frequency, the type-1 coil demonstrated a state-of-the-art PTE of ~ 4% (channel length = 15 mm) with a return loss (RL) > 20 dB on both the input and output sides, within an area constraint of < 18×18 mm. In contrast, the type-2 coil achieved a PTE of ~ 2% with an RL > 15 dB, for a smaller receiving coil area of < 5×5 mm for the same tissue environment. To complement the coils, we demonstrate a 65 nm test chip with an integrated energy harvester, which includes a 30-stage rectifier and low-dropout regulator (LDO), producing a stable ~ 1V DC output within tissue medium, matching theoretical predictions and simulations. Furthermore, we provide a robust and comprehensive guideline for advancing efficient inductive links for various BWPT applications, with shared resources in GitHub available for utilization by the broader community.
An Energy-Efficient Configurable 1-D CNN-Based Multi-Lead ECG Classification Coprocessor for Wearable Cardiac Monitoring Devices
Zhang C, Huang Z, Zhou C, Qie A and Wang X
Many electrocardiogram (ECG) processors have been widely used for cardiac monitoring. However, most of them have relatively low energy efficiency, and lack configurability in classification leads number and inference algorithm models. A multi-lead ECG coprocessor is proposed in this paper, which can perform efficient ECG anomaly detection. In order to achieve high sensitivity and positive precision of R-peak detection, a method based on zero-crossing slope adaptive threshold comparison is proposed. Also, a one-dimensional convolutional neural network (1-D CNN) based classification engine with reconfigurable processing elements (PEs) is designed, good energy efficiency is achieved by combining filter level parallelism and output channel parallelism within the PE chains with register level data reuse strategy. To improve configurability, a single instruction multiple data (SIMD) based central controller is adopted, which facilitates ECG classification with configurable number of leads and updatable inference models. The proposed ECG coprocessor is fabricated using 55 nm CMOS technology, supporting classification with an accuracy of over 98%. The test results indicate that the chip consumes 62.2 nJ at 100 MHz, which is lower than most recent works. The energy efficiency reaches 397.1 GOPS/W, achieving an improvement of over 40% compared to the reported ECG processors using CNN models. The comparison results show that this design has advantages in energy overhead and configurability.
Compact Low-Power Interfacing and Data Reduction for Floating Active Intracortical Neural Probes with Modular Architecture
Willaredt R, Grandauer C, Dorigo D, Wendler D, Kuhl M and Manoli Y
Host connectivity for invasive, high-density neural probes that integrate all the circuits needed for insitu digitization of brain activity in the shank requires a thin and conformal cable. To minimize tissue damage during insertion or from micro-movements during chronic use, the wiring must be constrained in size with a low number of interconnects. Reducing the number of traces results in thinner and more flexible cables and allows the data rate to be increased by using wider traces. Fewer contacts are also less susceptible to reliability issues in long-term applications. This paper presents a modular digital neural probe that embeds a two-wire bidirectional interface for host connectivity minimizing the data overhead for configuration and readout. The presented handshaking allows synchronization of multiple shanks and is designed to adapt to varying line delays caused by different cable lengths or changing environmental conditions. Data reduction based on delta encoding further increases the number of electrodes that can be read out simultaneously. The system is validated in a 192-channel neural probe fabricated in a 180nm CMOS technology with a supply voltage of 1.2 V.
An Active Microchannel Neural Interface for Implantable Electrical Stimulation and Recording
Habibollahi M, Jiang D, Lancashire HT and Demosthenous A
A mm-sized, implantable neural interface for bidirectional control of the peripheral nerves with microchannel electrodes is presented in this paper. The application-specific integrated circuit (ASIC) developed in a 0.18 μm CMOS technology is designed to achieve highly selective, concurrent control of 300-μm-wide groups of small nerve sections. It has in-situ, high-voltage-compliant (45 V) electrical stimulation and low-voltage (1.8 V) neural recording in each channel. Biphasic stimulus current pulses up to 124 μA with a 2 μA resolution are generated between 7.4 Hz and 20 kHz frequencies to stimulate and block neural activity. Action potentials are measured across a 10 kHz bandwidth with a variable gain response that ranges up to 72 dB. The neural recording front-end implements a low-power and low-noise biopotential amplifier with an input-referred noise (IRN) of 2.74 μVrms across the full measurement bandwidth. Automatic detection and reduction of stimulus artifacts is realised using a pole-shifting mechanism with a 1-ms amplifier recovery time. Versatile control of concurrently-operating channels is achieved in a two-channel, 2.31 mm interface ASIC using local control that allows up to seven devices to operate in parallel. Invitro validation of the active interface shows feasibility for closed-loop peripheral nerve control, while ex-vivo analyses of concurrent stimulation and recording demonstrates the measured neural response to electrical stimuli.
A Motion-Artifact-Tolerant Biopotential-Recording IC with a Digital-Assisted Loop
Kim Y, Seok C, Jung Y, Kweon SJ, Ha S and Je M
This paper proposes a motion-artifact-tolerant multi-channel biopotential-recording IC. A simple counter-based digital-assisted loop (DAL), implemented entirely with digital circuits, is proposed to track motion artifacts. The DAL effectively tracks motion artifacts without signal loss for amplitudes up to 120 mV with a 10 Hz bandwidth and can accommodate even larger motion artifacts, up to 240 mV, with a 5 Hz bandwidth, demonstrating its robustness across various conditions and motion artifact ranges. The IC includes four analog front-end (AFE) channels, and they share the following programmable gain amplifier (PGA) and analog-to-digital converter (ADC) in a time-multiplexed manner. It supports a programmable gain from 20 dB to 54 dB. Furthermore, the chopper with an analog DC-servo loop (DSL) is added to cancel out electrode DC offsets (EDO) and achieve a low noise level by removing the 1/f noise. The proposed IC fabricated in a 0.18-μm CMOS technology process achieves an input-referred noise (IRN) of 0.71 μVrms over a bandwidth of 0.5 to 500 Hz and a signal-to-noise-and-distortion ratio (SNDR) of 63.34 dB. It consumes 5.74 μW of power and occupies an area of 0.40 mm per channel. As a result, the proposed IC can record various biopotential signals thanks to its artifact-tolerant and low-noise characteristics.
An Ultra-low-power Amplifier-less Potentiostat Design Based on Digital Regulation Loop
Akram MA, Aberra A, Kweon SJ and Ha S
This paper presents a new potentiostat circuit architecture for interfaces with amperometric electrochemical biosensors. The proposed architecture, which is based on a digital low-dropout regulator (DLDO) structure, successfully eliminates the need for transimpedance amplifier (TIA), control amplifier, and other passive elements unlike other typical potentiostat topologies. It can regulate the required electrode voltages and measure the sensor currents (I) at the same time by using a simple implementation with clocked comparators, digital loop filters, and current-steering DACs. Three different configurations of the proposed potentiostat are discussed including single-side regulated (SSR) potentiostat, dual-side regulated (DSR) potentiostat, and differential sensing DSR potentiostat with a background working electrode. These proposed potentiostats were designed and fabricated in a 180 nm CMOS process, occupying an active silicon areas of 0.0645 mm, 0.1653 mm, and 0.266 mm, respectively. Validation results demonstrate that the proposed potentiostats operate on a wide sampling frequency range from 100 Hz to 100 MHz and supply voltage range from 1 V to 1.8 V. The proposed DSR potentiostat achieves a minimal power consumption of 3.7 nW over the entire dynamic range of 129.5 dB.
Closed-Loop Implantable Neurostimulators for Individualized Treatment of Intractable Epilepsy: A Review of Recent Developments, Ongoing Challenges, and Future Opportunities
Kassiri H, Muneeb A, Salahi R and Dabbaghian A
Driven by its proven therapeutic efficacy in treating movement disorders and psychiatric conditions, neurostimulation has emerged as a promising intervention for intractable epilepsy. Researchers envision an advanced implantable device capable of long-term neuronal monitoring, high spatio-temporal resolution data processing, and timely responsive neurostimulation upon seizure detection. However, the stringent energy constraints of implantable devices and significant inter-patient variability in neural activity pose substantial challenges and opportunities for biomedical circuits and systems researchers. For seizure detection, various ASIC solutions employing both deterministic and data-driven algorithms have been developed. These solutions leverage a subset of numerous signal features (spanning time and frequency domains) and classifiers (such as SVMs, DNNs, SNNs) to achieve notable success in terms of detection accuracy, latency, and energy efficiency. Implementations vary widely in computational approaches (digital, mixed-signal, analog, spike-based), training strategies (online versus offline), and application targets (patient-specific versus cross-patient). In terms of treatment, recent efforts have focused on the personalization of stimulation waveforms to enhance therapeutic efficacy. This personalization faces complex challenges, including a limited understanding of how stimulation parameters influence neuronal activity, the lack of a comprehensive brain model to capture its intricate electrochemical dynamics, and recording neural signals in the presence of stimulation artifacts. This review provides a comprehensive overview of the field, detailing the foundational principles, recent advancements, and ongoing challenges in enhancing the diagnostic accuracy, treatment efficacy, and energy efficiency of implantable patient-optimized neurostimulators. We also discuss potential future directions, emphasizing the need for standardized performance metrics, advanced computational models, and adaptive stimulation protocols to realize the full potential of this transformative technology.
A Highly-Scalable Poisson-Coded Retinal Optogenetic Stimulator With Fully-Analog ED-Based Adaptive Spike Detection and Closed-Loop Calibration
Yousefi T, Zoidl G and Kassiri H
We present a fully implantable, inductively powered optogenetic stimulator that enhances stimulation efficacy and pathway specificity while maximizing energy efficiency and channel-count scalability. By leveraging opsins' photon integration properties with raster scanning and Poisson-coded stimulation, we achieve a uniform power profile and reduce wiring complexity, enabling a scalable system that supports more stimulation channels without compromising safety or functionality, improving prosthetic vision resolution. We also employed a compact and power-efficient (0.026 and 1.02 W overhead) SNR-boosted ADC-less spike detection circuit to adapt each LED's light intensity based on real-time feedback from RGC spiking cells. This closed-loop adaptivity adjusts stimulation to opsin distribution variations, over time and across different patients, ensuring effective and consistent stimulation across patients, enhancing both energy efficiency and visual perception quality. The 3 3 IC, fabricated in 180nm CMOS, is coupled with a 100-channel custom optrode array fabricated using an InGaN process on a sapphire substrate. Experimental results demonstrate circuit-level performance, system-level efficacy, and in-vitro validation. Comparison tables highlight our work's advantages over state-of-the-art implantable spike detection systems and retinal prostheses.
A Programmable CMOS DEP Chip for Cell Manipulation
Lin WY, Lai LH, Lin YW and Lee CY
This work presents a programmable CMOS DEP chip that allows real-time control over the spatial distribution of DEP force, enabling controlled cell movement on the chip surface, from single-cell manipulation to multi-cell patterning. Implemented on a standard 0.18 μm CMOS process without post-processing, the chip features a 128 × 128 array of individually controllable 10 μm microelectrodes with 0.28 μm spacing. Utilizing Metal 5 electrodes in a 1P6M process, the chip achieves particle manipulation speeds up to 27 μm/s while operating at only 1.8 V, preserving cell viability as confirmed through post- DEP assessments. The implementation of time-sharing patterns enhances manipulation precision by creating distinct boundaries between phases. Experiments demonstrate the chip's capabilities in particle patterning, concentration control, and single-particle manipulation, all performed sequentially on the same chip. Additionally, stem cell aggregation control demonstration offers possibilities for future differentiation studies. With its reconfigurability, this DEP chip offers promising solutions to technical challenges in cell preparation, drug screening, and other biological applications.
A portable chip-based Overhauser DNP platform for biomedical liquid sample analysis
Yang Q, Lotfi H, Dreyer F, Kern M, Blumich B and Anders J
Low-field nuclear magnetic resonance (NMR) instruments are an indispensable tool in industrial research and quality control. However, the intrinsically low spin polarization at low magnetic fields severely limits their detection sensitivity and measurement throughput, preventing their widespread use in biomedical analysis. Overhauser dynamic nuclear polarization (ODNP) effectively addresses this problem by transferring the spin polarization from free electrons to protons, significantly enhancing sensitivity. In this paper, we explore the potential of using ODNP for signal enhancement in a custom-designed portable chipbased DNP-enhanced NMR platform, which is centered around a miniaturized microwave (MW) transmitter, a custom-designed NMR-on-a-chip transceiver, and two application-specific ODNP probes. The MW transmitter provides frequency synthesis, signal modulation, and power amplification, providing sufficient output power for efficient polarization transfer. The NMR-on-a-chip transceiver combines a radio frequency (RF) transmitter with a fully differential quadrature receiver, providing pulsed excitation and NMR signal down-conversion and amplification. Two customdesigned ODNP probes are used for proof-of-concept DNPenhanced NMR relaxometry and spectroscopy measurements. The presented chip-based ODNP platform achieves a maximum MW output power of 34dBm, resulting in a signal enhancement of -162 using the relaxometry ODNP probe with 1.4 μL of 10mM non-degassed TEMPOL solution, and an enhancement of -63 with the spectroscopy ODNP probe using 50 nL of the same solution. The proton polarization was increased from 0.5×10 to 81×10 at a low field of 0.16T. Proof-of-concept measurements on radical-doped tattoo inks and acetic acid verify the potential of our chip-based ODNP platform for the analysis of biologically and medically relevant parameters such as relaxation times, chemical shifts, and hyperfine interactions.
A 153.4 dB-DR PPG Recording IC with Extended Counting and Hardware Reuse
Wei T, Chen H, Lai J, Ni J, Zeng X and Hong Z
Photoplethysmogram (PPG) is widely used in wearable devices for health monitoring. High-precision signals are essential for medical diagnostics. However, motion artifacts in these devices can cause significant ambient light variation during PPG recording. This paper presents an accurate PPG recording front end with enhanced ambient light rejection (ALR). Quantization noise in a second-order sigma-delta modulator (SDM), used for direct current conversion, is reduced by extended counting of the modulator's residue. The first integrator of the SDM and the residue analog-to-digital converter (ADC) are reused in ALR circuits. The correlated double sampling (CDS) technique is enhanced by applying a first-order approximation of ambient light. Gain error in the residue ADC is reduced by charge compensation. The PPG front-end, implemented in a 180 nm process, achieves a dynamic range (DR) of 153.4 dB within a bandwidth of 20 Hz. The system operates with a minimum 1.28% duty cycle. Measurements of heart rate and blood oxygen at the fingertip and wrist verify the functionality of the PPG front end.
A 402 MHz and 1.73-VCE Resonance Regulating Rectifier with On-Chip Antennas for Bioimplants
Liu G and Hu Y
In this paper, a wireless power transfer (WPT) system composed of a voltage-mode fully integrated resonance regulating rectifier (IR) and an on-chip antenna running at 402 MHz has been designed for bioimplants in deep tissue. The proposed IR, including a 200 pF decoupling capacitor, is implemented in a 0.22 mm active area in the 180-nm CMOS process. A charging duration based regulation compensation circuit offers a low ripple factor of 0.3% at a 1.8 V output voltage and a high voltage conversion efficiency (VCE) of 1.73 to overcome the low inductive coupling coefficient (under 0.01) due to the deep implant scenario. And a clock gating VCDL-based on-&-off delay compensation scheme is proposed to compensate for the phase error of the IR. Performing rectification and regulation simultaneously in a single stage, the IR effectively enhances power conversion efficiency. The whole system achieves a power conversion efficiency (PCE) of 65% with a 1.5 mW load. In addition, digital control-based compensation circuits also improve its transient response performance, the 1% setting time is only 6.9 μs when the load changes from 65 μW to 1.5 mW.
A Wireless Implantable Closed-Loop Electrochemical Drug Delivery System
Wang ML, Yeon P, Mofidfar M, Chamberlayne C, Xu H, Annes JP, Zare RN and Arbabian A
Wireless implantable drug delivery systems (DDSs) enable targeted, on-demand drug release to maximize therapeutic efficacy. Ultrasound has been proposed to wirelessly power and control millimeter-sized deeply implantable DDSs, but initial demonstrations encountered challenges in power transfer and release control reliability in dynamic in vivo environments. In this work, we present a closed-loop implantable DDS using ultrasound wireless power and communication in conjunction with an electrochemical drug release mechanism. The system consists of piezoelectric transducers for wireless power and data transmission, a drug delivery module containing drug-loaded electroresponsive nanoparticles, and a custom CMOS integrated circuit for closed-loop drug release using a programmable potentiostat capable of providing potentials up to ±1.5 V and sensing current up to ±100 μA. The chip also improves power transfer robustness by enabling ultrasound power combining and rectifier voltage feedback which can be used to adapt the power transmitter and minimize misalignment. Closed-loop release control is tested in vitro using the wirelessly powered DDS at 8 cm depth by adjusting the potentiostat stimulus voltage based on feedback of redox current into fluorescein-loaded nanoparticles, resulting in consistent 2 μg release across different fluorescein loading concentrations and a 39% reduction in release amount variation. These results demonstrate the effectiveness of closed-loop release control in enabling precise and reliable drug delivery.
Hardware Optimization and Implementation of a 16-Channel Neural Tree Classifier for on-chip Closed-Loop Neuromodulation
Sharma AP, Rao KA and Somappa L
This work presents the development of on-chip machine learning (ML) classifiers for implantable neuromodulation system-on-chips (SoCs), aimed at detecting epileptic seizures for closed-loop neuromodulation applications. Tree-based classifiers have gained prominence due to low on-chip memory requirements for binary classification. This work focuses on optimizing hardware performance and associated trade-offs from two fronts, namely, (a) implementation of the Neural Tree (NT) classifier using model compression techniques and (b) design of feature extraction engine (FEE) using FIR filters and time-division multiplexed hardware optimizations. We provide insights into how model compression techniques of Neural Networks like weight pruning and weight sharing can be exploited to reduce the memory requirement of Neural Tree inference hardware. Both these techniques effectively reduce non-zero weights and therefore help to reduce memory requirements. We also detail the choice of feature extraction engine (FEE) hardware to extract temporal and spectral features and the relevant area-power-attenuation trade-offs for spectral feature extraction. The end-to- end hardware comprising the FEE, the Neural Tree classifier and serial peripherals are tested on a Zynq-7000 series SoC using pre-recorded patient data. The SoC-based evaluation platform allows rapid testing of various model optimizations on hardware using AXI protocol. The entire system, trained on data from the CHB-MIT scalp EEG database, achieved a sensitivity of 95.7% and a specificity of 94.3%, with an on-chip memory of 0.59 kB. Implementing the design in a 65nm CMOS process resulted in a worst-case power of 174 μW and an area of 0.16 mm. These findings along with the optimizations mark significant progress toward energy-efficient, scalable neuromodulation systems capable of real-time neurological disorder prediction.